Intel Fellow, Director Novel Patterning
Intel Corporation
Richard Schenker is an Intel Fellow and the director of novel patterning in the Technology and Manufacturing Group at Intel Corporation. He works within the group’s Components Research organization and leads a team developing novel patterning methods to enable continued scaling of “Moore’s law.” Schenker specializes in developing patterning-enhancement techniques for future lithography generations and design technology co-optimization. He joined Intel in 1997 as part of the advanced lithography group within the Components Research organization. Schenker pioneered the use of alternating phase-shift masks for gate patterning at Intel. He has also worked on several resolution-enhancement methods and novel patterning techniques implemented by Intel for density scaling. Richard holds a bachelor’s degree in electrical engineering from the University of Wisconsin-Madison; and a master’s degree and Ph.D. in electrical engineering, both from the University of California, Berkeley. Richard studied 193nm induced damage to lithographic materials and tooling at U.C. Berkeley under guidance of Professor Bill Oldham.
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Challenges and Building Blocks for 2030 Scaling and Beyond
Thursday, July 13, 2023
2:15 PM – 2:35 PM PDT