Senior Process Engineer
American Semiconductor, Inc.
Boise, ID, United States
Mr. Parker is a Senior Process Engineer at American Semiconductor. He has over 25 years of experience in wafer fabrication and advanced packaging process development at American Semiconductor, Micron Technology, Silicon Graphics, and Cray Research. He has been a process owner for numerous fab processes, including Wafer Bond, Chemical Mechanical Polish (CMP), Dry Etch, and Wafer Thinning (Backgrind). He has several patents and published technical papers in the field of semiconductor wafer fabrication. Randall holds engineering degrees from University of Wisconsin-Madison (MS-NEEP) and Rensselaer Polytechnic Institute (BSEP).
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Advanced FHE Bend, Twist Testing and Standardization
Tuesday, July 11, 2023
2:10 PM – 2:30 PM PDT